1. Field of the Invention
The present invention relates to a method for metallizing a pattern in a low dielectric constant (low-k) dielectric film on a substrate, and more particularly to a method for metallizing a dual damascene structure in a SiCOH-containing low-k film.
2. Description of Related Art
In material processing methodologies, pattern etching can comprise the application of a thin layer of radiation-sensitive material, such as photoresist, to an upper surface of a substrate that is subsequently patterned in order to provide a mask for transferring this pattern to the underlying thin film on a substrate during etching. The patterning of the radiation-sensitive material generally involves a lithographic process, wherein the radiation-sensitive material is exposed to a geometric pattern of electromagnetic (EM) radiation using, for example, a micro-lithography system, followed by the removal of the irradiated regions of the radiation-sensitive material (as in the case of positive resist), or non-irradiated regions (as in the case of negative resist) using a developing solvent.
Moreover, this lithographic mask layer may comprise multiple sub-layers. For example, the mask layer may further include an anti-reflective coating (ARC) underlying the layer of radiation-sensitive material. If the mask layer includes additional layers, such as an ARC layer, then the lithographic pattern formed in the layer of radiation-sensitive material may be transferred to the ARC layer using dry development techniques or wet development techniques.
These lithographic structures have been used to pattern features for front end of line (FEOL) operations, such as gate formation, as well as back-end-of-line (BEOL) operations, such as metal intra-/inter-connects. For example, a lithographic structure is often utilized in the preparation of dual damascene structures for BEOL operations. However, with the implementation of low dielectric constant (low-k) and ultra-low-k dielectric materials in BEOL structures, it has been recognized that the processes utilized for removing the lithographic mask can damage the dielectric material. Therefore, a hard mask layer (or layers) have been contemplated for insertion between the lithographic mask layer and the underlying dielectric material, wherein once the lithographic pattern is transferred to the hard mask layer (or layers), the lithographic mask layer may be removed, thus, reducing damage to the dielectric material.
Thereafter, the hard mask layer (or layers) may serve as the mask for patterning the dielectric material. In order to achieve sufficient etch selectivity between etching the dielectric material and etching the hard mask layer (or layers), metal hard mask layers, such as Ti-containing materials, Ta-containing materials, etc., have been contemplated. However, these metal hard masks pose additional problems, including, but not limited to, establishing an etch chemistry for patterning the metal hard mask, as well as removing the metal hard mask.